Table of Content
1. PIC16F877A Pinout Diagram and Overview
2. Detailed PIC16F877A Pin Configuration and Description
3. PIC16F877A ICSP Schematic for Programming
4. PIC16F877A Ports and I/O Configuration
5. PIC16F877A Block Diagram and Architecture
6. PIC16F877A Package Dimension - PDIP-40
7. PIC16F877A Pinout FAQs and Tips
1. PIC16F877A Pinout Diagram and Overview
The PIC16F877A is a versatile 8-bit microcontroller from Microchip Technology, renowned for its robust feature set and flexibility in embedded applications. This section provides a clear, detailed pinout diagram of the PIC16F877A, highlighting its 40-pin PDIP configuration and key functionalities. Each pin’s purpose—ranging from power, ground, and oscillator inputs to I/O ports, timers, and communication interfaces (UART, SPI, I²C)—is concisely explained to streamline your design process. Whether you’re prototyping or developing production-grade systems, this overview equips you with essential insights to harness the PIC16F877A’s capabilities efficiently. Explore the diagram and specifications to optimize your next project.
PIC16F877A Pinout Diagram(PDIP-40) Download pdf - P3/P234
Criteria | PIC16F877A-I/P PDIP-40 | PIC16F877A-I/PT TQFP-44 | PIC16F877A-I/L PLCC-44 | PIC16F877A-I/ML QFN-44 |
---|---|---|---|---|
Pin Count (Model) | 40 | 44 (4 NC pins) | 44 (4 NC pins) | 44 (4 NC pins) |
Dimensions (mm, Model) | 52.26 x 13.84 x 4.06 | 10 x 10 x 1.0 | 16.59 x 16.59 x 4.57 | 8 x 8 x 0.9 |
Pitch (mm, Model) | 2.54 (100 mil) | 0.8 | 1.27 (50 mil) | 0.5 |
Mounting Type (Model) | Through-Hole | Surface-Mount | Surface-Mount (Socketable) | Surface-Mount |
Key Features & Applications (Model) | Wide pin spacing, easy prototyping, robust for hobbyist/industrial use | Compact, low-profile, ideal for space-constrained designs | Square footprint, socketable, suited for legacy systems | Ultra-compact, excellent thermal performance, high-density PCBs |
Typical Use Case (Model) | Prototyping, educational projects, low-cost industrial control | Consumer electronics, compact IoT devices | Automotive modules, legacy industrial systems | Portable devices, advanced IoT applications |
Functional Differences (Model) | All 40 pins fully functional; no NC pins; ICSP on RB6/RB7, LVP on RB3 configurable | 4 NC pins (no function); same pinout for active pins; ICSP/LVP identical | 4 NC pins; socketable for easy reprogramming; ICSP/LVP unchanged | 4 NC pins; exposed pad for grounding; ICSP/LVP same but requires precise PCB layout |
Performance Differences (Model) | Higher thermal resistance (~70°C/W); suited for low-power, 20 MHz operation | Moderate thermal resistance (~50°C/W); reliable at 20 MHz in compact designs | Moderate thermal resistance (~45°C/W); stable for 20 MHz, legacy high-current use | Low thermal resistance (~30°C/W); best for high-frequency 20 MHz, high-power applications |
2. Detailed PIC16F877A Pin Configuration and Description
PDIP-40 Pin# | Pin Name | I/O/P Type | Buffer Type | Description |
---|---|---|---|---|
1 | MCLR/VPP MCLR VPP |
I P |
ST | Master Clear (input) or programming voltage (output). |
2 | RA0/AN0 RA0 AN0 |
I/O I |
TTL | Digital I/O. Analog input 0. |
3 | RA1/AN1 RA1 AN1 |
I/O I |
TTL | Digital I/O. Analog input 1. |
4 | RA2/AN2/VREF-/CVREF RA2 AN2 VREF- CVREF |
I/O I I O |
TTL | Digital I/O. Analog input 2. A/D reference voltage (Low) input. Comparator VREF output. |
5 | RA3/AN3/VREF+ RA3 AN3 VREF+ |
I/O I I |
TTL | Digital I/O. Analog input 3. A/D reference voltage (High) input. |
6 | RA4/T0CKI/C1OUT RA4 T0CKI C1OUT |
I/O I O |
ST | Digital I/O - Open-drain when configured as output. Timer0 external clock input. Comparator 1 output. |
7 | RA5/AN4/SS/C2OUT RA5 AN4 SS C2OUT |
I/O I I O |
TTL | Digital I/O. Analog input 4. SPI slave select input. Comparator 2 output. |
8 | RE0/RD/AN5 RE0 RD AN5 |
I/O I I |
ST/TTL(3) | Digital I/O. Read control for Parallel Slave Port. Analog input 5. |
9 | RE1/WR/AN6 RE1 WR AN6 |
I/O I I |
ST/TTL(3) | Digital I/O. Write control for Parallel Slave Port. Analog input 6. |
10 | RE2/CS/AN7 RE2 CS AN7 |
I/O I I |
ST/TTL(3) | Digital I/O. Chip select control for Parallel Slave Port. Analog input 7. |
11 | VDD | P | — | Positive supply for logic and I/O pins. |
12 | VSS | P | — | Ground reference for logic and I/O pins. |
13 | OSC1/CLKI OSC1 CLKI |
I I |
ST/CMOS(3) | Oscillator crystal or external clock input. |
14 | OSC2/CLKO OSC2 CLKO |
O O |
— | Oscillator crystal or clock output. |
15 | RC0/T1OSO/T1CKI RC0 T1OSO T1CKI |
I/O O I |
ST | Digital I/O. Timer1 oscillator output. Timer1 external clock input. |
16 | RC1/T1OSI/CCP2 RC1 T1OSI CCP2 |
I/O I I/O |
ST | Digital I/O. Timer1 oscillator input. Capture2 input, Compare2 output, PWM2 output. |
17 | RC2/CCP1 RC2 CCP1 |
I/O I/O |
ST | Digital I/O. Capture1 input, Compare1 output, PWM1 output. |
18 | RC3/SCK/SCL RC3 SCK SCL |
I/O I/O I/O |
ST | Digital I/O. Synchronous serial clock input/output for SPI mode. Synchronous serial clock input/output for I2C mode. |
19 | RD0/PSP0 RD0 PSP0 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
20 | RD1/PSP1 RD1 PSP1 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
21 | RD2/PSP2 RD2 PSP2 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
22 | RD3/PSP3 RD3 PSP3 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
23 | RC4/SDI/SDA RC4 SDI SDA |
I/O I I/O |
ST | Digital I/O. SPI data in. I2C data I/O. |
24 | RC5/SDO RC5 SDO |
I/O O |
ST | Digital I/O. SPI data out. |
25 | RC6/TX/CK RC6 TX CK |
I/O O I/O |
ST | Digital I/O. USART asynchronous transmit. USART synchronous clock. |
26 | RC7/RX/DT RC7 RX DT |
I/O I I/O |
ST | Digital I/O. USART asynchronous receive. USART synchronous data. |
27 | RD4/PSP4 RD4 PSP4 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
28 | RD5/PSP5 RD5 PSP5 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
29 | RD6/PSP6 RD6 PSP6 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
30 | RD7/PSP7 RD7 PSP7 |
I/O I/O |
ST/TTL(3) | Digital I/O. Parallel Slave Port data. |
31 | VSS | P | — | Ground reference for logic and I/O pins. |
32 | VDD | P | — | Positive supply for logic and I/O pins. |
33 | RB0/INT RB0 INT |
I/O I |
TTL/ST(1) | Digital I/O. External interrupt. |
34 | RB1 | I/O | TTL | Digital I/O. |
35 | RB2 | I/O | TTL | Digital I/O. |
36 | RB3/PGM RB3 PGM |
I/O I |
TTL | Digital I/O. Low-voltage ICSP programming enable pin. |
37 | RB4 | I/O | TTL | Digital I/O. |
38 | RB5 | I/O | TTL | Digital I/O. |
39 | RB6/PGC RB6 PGC |
I/O I |
TTL/ST(2) | Digital I/O. In-circuit debugger and ICSP programming clock. |
40 | RB7/PGD RB7 PGD |
I/O I/O |
TTL/ST(2) | Digital I/O. In-circuit debugger and ICSP programming data. |

Legend: I = input; O = output; I/O = input/output; P = power; — = Not used; TTL = TTL input; ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
Note 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
Note 3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
3. PIC16F877A ICSP Schematic for Programming
PIC16F87XA microcontrollers can be serially programmed while in the end application circuit. This is simply done with two lines for clock and data and three other lines for power, ground and the programming voltage. This allows customers to manufacture boards with unprogrammed devices and then program the microcontroller just before shipping the product. This also allows the most recent firmware or a custom firmware to be programmed. When using ICSP, the part must be supplied at 4.5V to 5.5V if a bulk erase will be executed. This includes reprogramming of the code-protect, both from an on state to an off state. For all other cases of ICSP, the part may be programmed at the normal operating voltages. This means calibration values, unique user IDs or user code can be reprogrammed or added.
Low-Voltage (Single-Supply) ICSP Programming
The LVP bit of the configuration word enables lowvoltage ICSP programming. This mode allows the microcontroller to be programmed via ICSP using a VDD source in the operating voltage range. This only means that VPP does not have to be brought to VIHH but can instead be left at the normal operating voltage. In this mode, the RB3/PGM pin is dedicated to the programming function and ceases to be a general purpose I/O pin. During programming, VDD is applied to the MCLR pin. To enter Programming mode, VDD must be applied to the RB3/PGM provided the LVP bit is set. The LVP bit defaults to on (‘1’) from the factory. If Low-Voltage Programming mode is not used, the LVP bit can be programmed to a ‘0’ and RB3/PGM becomes a digital I/O pin. However, the LVP bit may only be programmed when programming is entered with VIHH on MCLR. The LVP bit can only be charged when using high voltage on MCLR. It should be noted, that once the LVP bit is programmed to ‘0’, only the High-Voltage Programming mode is available and only High-Voltage Programming mode can be used to program the device. When using low-voltage ICSP, the part must be supplied at 4.5V to 5.5V if a bulk erase will be executed. This includes reprogramming of the code-protect bits from an on state to an off state. For all other cases of low-voltage ICSP, the part may be programmed at the normal operating voltage. This means calibration values, unique user IDs or user code can be reprogrammed or added.
Pin Name | During Programming | ||
---|---|---|---|
Function | Pin Type | Pin Description | |
RB3 | PGM | I | Low voltage ICSP™ programming input if LVP configuration bit equals '1' |
RB6 | CLOCK | I | Clock input |
RB7 | DATA | I/O | Data input/output |
MCLR | VTEST MODE | P* | Program Mode Select |
VDD | VDD | P | Power Supply |
VSS | VSS | P | Ground |

4. PIC16F877A Ports and I/O Configuration
The PIC16F877A microcontroller features 33 GPIO pins organized into five bidirectional I/O ports (PORTA to PORTE), providing flexible interfacing for embedded systems. Each port is controlled by corresponding TRISx and PORTx registers, enabling precise pin configuration and data manipulation. Below is a concise overview tailored for electronic engineers:
- PORTA (6 pins, RA0–RA5): A versatile port with analog capabilities (AN0–AN4). Configure as digital I/O by setting ADCON1 to 0x06. TRISA sets pin direction (1 = input, 0 = output). RA4 is an open-drain output, requiring an external pull-up resistor (e.g., 4.7kΩ).
- PORTB (8 pins, RB0–RB7): Digital I/O with interrupt-on-change and weak pull-up options. TRISB controls direction. Ideal for external interrupts (RB0/INT) and serial communication (e.g., RB6/RB7 for ICSP).
- PORTC (8 pins, RC0–RC7): Digital I/O with peripherals like UART (RC6/TX, RC7/RX) and PWM (RC1/CCP2, RC2/CCP1). TRISC sets direction. Peripherals may override TRIS settings, so consult the datasheet for conflicts.
- PORTD (8 pins, RD0–RD7): Digital I/O with parallel slave port capability. TRISD configures direction. Suitable for high-current applications due to robust drive strength.
- PORTE (3 pins, RE0–RE2): Bidirectional I/O with analog inputs (AN5–AN7). TRISE sets direction, except for RE3 (input-only). Commonly used for parallel slave port control.
Key Configuration Notes:
- TRISx Registers: Set to 1 for input, 0 for output. Use bit-level operations to avoid read-modify-write issues (e.g., BSF, BCF in assembly or TRISBbits.TRISB0 = 0 in C).
- PORTx Registers: Read input states or write output values. Writing 1 sets a pin high; 0 sets it low.
- Multiplexed Functions: Many pins support alternate functions (e.g., ADC, SPI, I²C). Disable peripherals via control registers (e.g., SPEN, ADCON0) to use pins as general-purpose I/O.
- Electrical Specs: Operate within 2.0V–5.5V. Check Section 17.0 (Electrical Characteristics) in the datasheet(
Download pdf - 2.5MB/234 pages ) for current limits and timing.
This configuration flexibility makes the PIC16F877A ideal for applications like sensor interfacing, motor control, and communication systems. For detailed register settings and example code, refer to the PIC16F877A datasheet or MPLAB XC8 tutorials.
5. PIC16F877A Block Diagram and Architecture
PIC16F877A Block Diagram Download pdf - P6/P234
The PIC16F877A, an 8-bit microcontroller from Microchip Technology, is built on a Harvard architecture with a robust feature set for embedded applications. This section provides a concise overview of its block diagram and internal architecture, tailored for electronic engineers designing efficient systems.
Core Architecture:
- 8-bit CPU: Executes instructions in a single cycle (4 oscillator clocks), except for branches. Operates at up to 20 MHz with a 200 ns instruction cycle.
- Program Memory: 8K x 14-bit Flash, supporting up to 8,192 instructions. Erasable and programmable via ICSP.
- Data Memory: 368 bytes of RAM and 256 bytes of EEPROM for flexible data storage.
- Stack: 8-level deep hardware stack for subroutine calls and interrupts.
Key Functional Blocks:
- Oscillator Module: Supports multiple modes (XT, HS, LP, RC) with external crystals or clocks. Configured via OSCCON for precise timing.
- I/O Ports: 33 GPIO pins across five ports (A–E), configurable via TRISx and PORTx registers. Ports support analog inputs, PWM, and communication peripherals.
- Timer Modules: Three timers (Timer0, Timer1, Timer2) for timekeeping, PWM generation, and event counting. Timer1 supports external clock inputs.
- Communication Interfaces: Includes USART (for serial communication), MSSP (SPI/I²C), and parallel slave port for versatile data exchange.
- Analog Features: 10-bit ADC with 8 channels (AN0–AN7) for precise analog-to-digital conversion, configured via ADCON0/1.
- Interrupt Controller: Supports multiple interrupt sources (e.g., timers, external pins, ADC) with priority handling for real-time responsiveness.
Block Diagram Highlights:
- The block diagram illustrates the separation of program memory and data memory buses, characteristic of Harvard architecture, ensuring simultaneous instruction fetch and data access.
- Peripheral modules (e.g., ADC, USART, timers) connect to the CPU via a shared data bus, controlled by special function registers (SFRs).
- Power management features, including sleep mode and brown-out reset, optimize energy efficiency.
Design Considerations:
- Configure peripherals via SFRs (e.g., TXSTA for USART, T2CON for Timer2) to avoid conflicts with GPIO functions.
- Use MPLAB XC8 or assembly for efficient code, leveraging the 35-instruction set for compact programming.
- Refer to Section 2.0 (Device Overview) and Section 3.0 (Oscillator Configurations) in the PIC16F877A datasheet
Download pdf - 2.5MB/234 pages for detailed block diagram and setup guidance.
The PIC16F877A’s architecture balances performance and flexibility, making it ideal for applications like industrial control, sensor networks, and IoT devices. Explore the block diagram and register settings to optimize your design.
6. PIC16F877A Package Dimension - PDIP-40
PIC16F877A Case Package Dimension(PDIP-40)
Dimension Limits | Units | INCHES* | MILLIMETERS | ||||
---|---|---|---|---|---|---|---|
MIN | NOM | MAX | MIN | NOM | MAX | ||
Number of Pins | n | 40 | 40 | ||||
Pins Pitch | p | .100 | 2.54 | ||||
Top to Seating Plane | A | .160 | .175 | .190 | 4.06 | 4.45 | 4.83 |
Molded Package Thickness | A2 | .140 | .150 | .160 | 3.56 | 3.81 | 4.06 |
Base to Seating Plane | A1 | .015 | 0.38 | ||||
Shoulder to Shoulder Width | E | .595 | .600 | .625 | 15.11 | 15.24 | 15.88 |
Molded Package Width | E1 | .530 | .545 | .560 | 13.46 | 13.84 | 14.22 |
Overall Length | D | 2.045 | 2.058 | 2.065 | 51.94 | 52.26 | 52.45 |
Tip to Seating Plane | L | .120 | .130 | .135 | 3.05 | 3.30 | 3.43 |
Lead Thickness | c | .008 | .012 | .015 | 0.20 | 0.29 | 0.38 |
Upper Lead Width | B1 | .030 | .050 | .070 | 0.76 | 1.27 | 1.78 |
Lower Lead Width | B | .014 | .018 | .022 | 0.36 | 0.46 | 0.56 |
Overall Row Spacing § |
eB | .620 | .650 | .680 | 15.75 | 16.51 | 17.27 |
Mold Draft Angle Top | α | 5 | 10 | 15 | 5 | 10 | 15 |
Mold Draft Angle Bottom | β | 5 | 10 | 15 | 5 | 10 | 15 |
PIC16F877A Package Dimension(PDIP-40) Download pdf - P211/P234
Note:
1). * Controlling Parameter; 2). § Significant Characteristic; 3). Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
7. PIC16F877A Pinout FAQs and Tips
The PIC16F877A, a 40-pin 8-bit microcontroller from Microchip Technology, offers versatile pinout configurations for embedded designs. This section addresses common questions and provides practical tips for electronic engineers to optimize pin usage and avoid pitfalls.
FAQs:
Q: What are the power and ground pins?
A: VDD (pins 11, 32) and VSS (pins 12, 31) support 2.0V–5.5V operation. Use 0.1µF decoupling capacitors near each VDD pin to ensure stability.
Q: How is the MCLR pin configured?
A: MCLR (pin 1) is the master clear reset. Connect a 4.7kΩ–10kΩ pull-up resistor to VDD and an optional 0.1µF capacitor to ground for noise immunity. Set CONFIG bits to enable/disable reset functionality.
Q: Which pins support analog inputs?
A: PORTA (RA0–RA5) and PORTE (RE0–RE2) provide 8 ADC channels (AN0–AN7). Disable analog functions via ADCON1 (e.g., 0x06 for all digital) to use as digital I/O.
Q: Can I use RB6/RB7 for general I/O during ICSP?
A: RB6 (PGC) and RB7 (PGD) are used for ICSP. Avoid loading these pins during programming to prevent signal interference. Post-programming, they can function as general I/O.
Q: What is the role of the RB3/PGM pin in low-voltage programming?
A: When the LVP bit is enabled (‘1’ in CONFIG word), RB3 is dedicated to low-voltage ICSP and cannot be used as I/O. Disable LVP (set to ‘0’) to reclaim RB3 as a digital I/O pin, but this requires high-voltage programming thereafter.
Practical Tips:
- Pin Multiplexing: Many pins support alternate functions (e.g., USART on RC6/RC7, PWM on RC1/RC2). Check SFRs (e.g., SPEN, CCP1CON) to disable peripherals and free pins for general I/O.
- Open-Drain Pins: RA4 and RB3 (if LVP disabled) are open-drain outputs. Use external pull-up resistors (e.g., 4.7kΩ) for reliable logic-high signals.
- Current Limits: Source/sink up to 25mA per pin, with a 200mA total limit per port. Refer to Section 17.0 (Electrical Characteristics) in the datasheet for detailed specs.
- ICSP Setup: For in-circuit programming, isolate RB6/RB7 from heavy loads (e.g., via resistors or buffers) to ensure reliable clock and data signals.
- Debugging Tip: If a pin behaves unexpectedly, verify TRISx settings (1 = input, 0 = output) and ensure no peripheral overrides (e.g., ADC, SPI) are active.
Resources: Consult Section 2.0 (Device Overview) and Section 14.0 (In-Circuit Serial Programming) in the PIC16F877A datasheet for pinout diagrams and ICSP details. Use MPLAB X IDE with XC8 compiler for configuration examples.
These FAQs and tips streamline your design process, ensuring robust pin configuration for applications like sensor interfacing, motor control, and communication systems.